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ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
14 years 17 days ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers
ICS
1999
Tsinghua U.
14 years 22 days ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
IPPS
2005
IEEE
14 years 2 months ago
Scheduling Algorithms for Effective Thread Pairing on Hybrid Multiprocessors
With the latest high-end computing nodes combining shared-memory multiprocessing with hardware multithreading, new scheduling policies are necessary for workloads consisting of mu...
Robert L. McGregor, Christos D. Antonopoulos, Dimi...
TON
2002
86views more  TON 2002»
13 years 8 months ago
Efficient randomized web-cache replacement schemes using samples from past eviction times
The problem of document replacement in web caches has received much attention in recent research, and it has been shown that the eviction rule "replace the least recently used...
Konstantinos Psounis, Balaji Prabhakar
WWW
2008
ACM
14 years 9 months ago
Geographic web usage estimation by monitoring DNS caches
DNS is one of the most actively used distributed databases on earth, accessed by millions of people every day to transparently convert host names into IP addresses and vice versa....
Hüseyin Akcan, Torsten Suel, Hervé Br&...