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IPPS
2006
IEEE
14 years 1 months ago
Dynamically reconfigurable cache architecture using adaptive block allocation policy
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propo...
Milene Barbosa Carvalho, Luís Fabríc...
IPPS
2006
IEEE
14 years 1 months ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell
ECRTS
2006
IEEE
14 years 1 months ago
WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Isabelle Puaut
MSS
2007
IEEE
86views Hardware» more  MSS 2007»
14 years 1 months ago
RAIF: Redundant Array of Independent Filesystems
Storage virtualization and data management are well known problems for individual users as well as large organizations. Existing storage-virtualization systems either do not suppo...
Nikolai Joukov, Arun M. Krishnakumar, Chaitanya Pa...
ICS
2001
Tsinghua U.
13 years 12 months ago
Analytical cache models with applications to cache partitioning
An accurate, tractable, analytic cache model for time-shared systems is presented, which estimates the overall cache missrate of a multiprocessing system with any cache size and t...
G. Edward Suh, Srinivas Devadas, Larry Rudolph