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ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
13 years 11 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
JEI
2006
162views more  JEI 2006»
13 years 7 months ago
Markovian segmentation and parameter estimation on graphics hardware
In this paper, we show how Markovian strategies used to solve well-known segmentation problems such as motion estimation, motion detection, motion segmentation, stereovision, and c...
Pierre-Marc Jodoin, Max Mignotte
IPPS
2009
IEEE
14 years 2 months ago
Accelerating error correction in high-throughput short-read DNA sequencing data with CUDA
Emerging DNA sequencing technologies open up exciting new opportunities for genome sequencing by generating read data with a massive throughput. However, produced reads are signif...
Haixiang Shi, Bertil Schmidt, Weiguo Liu, Wolfgang...
HPDC
2007
IEEE
14 years 1 months ago
Precise and realistic utility functions for user-centric performance analysis of schedulers
Utility functions can be used to represent the value users attach to job completion as a function of turnaround time. Most previous scheduling research used simple synthetic repre...
Cynthia Bailey Lee, Allan Snavely
IPPS
2006
IEEE
14 years 1 months ago
An experimental study of optimizing bioinformatics applications
As bioinformatics is an emerging application of high performance computing, this paper first evaluates the memory performance of several representative bioinformatics application...
Guangming Tan, Lin Xu, Shengzhong Feng, Ninghui Su...