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» Caches and Hash Trees for Efficient Memory Integrity
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SIGARCH
2008
96views more  SIGARCH 2008»
13 years 7 months ago
Towards hybrid last level caches for chip-multiprocessors
As CMP platforms are widely adopted, more and more cores are integrated on to the die. To reduce the off-chip memory access, the last level cache is usually organized as a distribu...
Li Zhao, Ravi Iyer, Mike Upton, Don Newell
MICRO
2010
IEEE
146views Hardware» more  MICRO 2010»
13 years 5 months ago
The ZCache: Decoupling Ways and Associativity
The ever-increasing importance of main memory latency and bandwidth is pushing CMPs towards caches with higher capacity and associativity. Associativity is typically improved by in...
Daniel Sanchez, Christos Kozyrakis
TOIS
2002
97views more  TOIS 2002»
13 years 7 months ago
Burst tries: a fast, efficient data structure for string keys
Many applications depend on efficient management of large sets of distinct strings in memory. For example, during index construction for text databases a record is held for each d...
Steffen Heinz, Justin Zobel, Hugh E. Williams
AINA
2007
IEEE
14 years 1 months ago
Synthetic Trace-Driven Simulation of Cache Memory
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...
ACNS
2009
Springer
142views Cryptology» more  ACNS 2009»
14 years 2 months ago
Integrity Protection for Revision Control
Abstract. Users of online-collaboration tools and network storage services place considerable trust in their providers. This paper presents a novel approach for protecting data int...
Christian Cachin, Martin Geisler