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TSP
2008
123views more  TSP 2008»
13 years 7 months ago
A Rough Programming Approach to Power-Balanced Instruction Scheduling for VLIW Digital Signal Processors
The focus of this paper is on VLIW instruction scheduling that minimizes the variation of power consumed by the processor during the execution of a target program. We use rough set...
Shu Xiao, Edmund Ming-Kit Lai
WISE
2002
Springer
14 years 17 days ago
Optimized Translation of XPath into Algebraic Expressions Parameterized by Programs Containing Navigational Primitives
We propose a new approach for the efficient evaluation of XPath expressions. This is important, since XPath is not only used as a simple, stand-alone query language, but is also ...
Sven Helmer, Carl-Christian Kanne, Guido Moerkotte
ISCA
1991
IEEE
162views Hardware» more  ISCA 1991»
13 years 11 months ago
Comparison of Hardware and Software Cache Coherence Schemes
We use mean value analysis models to compare representative hardware and software cache coherence schemes for a large-scale shared-memory system. Our goal is to identify the workl...
Sarita V. Adve, Vikram S. Adve, Mark D. Hill, Mary...
ICLP
1997
Springer
13 years 11 months ago
Solving Small TSPs with Constraints
This paper presents a set of techniques that makes constraint programming a technique of choice for solving small (up to 30 nodes) traveling salesman problems. These techniques in...
Yves Caseau, François Laburthe
ICPPW
2002
IEEE
14 years 19 days ago
Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transf...
Jaume Abella, Antonio González, Josep Llosa...