347 search results - page 63 / 70 » Caching processor general registers |
EXPCS
2007
14 years 2 months ago
2007
Measuring the indirect cost of context switch is a challenging problem. In this paper, we show our results of experimentally quantifying the indirect cost of context switch using ...
ICDCS
1995
IEEE
1995
IEEE
Implementing Sequentially Consistent Shared Objects Using Broadcast and Point-to-Point Communication
14 years 2 months ago
A distributed algorithm that implements a sequentially consistent collection of shared read/update objects using a combination of broadcast and point-to-point communication is pre...
CASES
2010
ACM
13 years 9 months ago
2010
ACM
We present a fine-grain dynamic instruction placement algorithm for small L0 scratch-pad memories (spms), whose unit of transfer can be an individual instruction. Our algorithm ca...
EGH
2010
Springer
13 years 9 months ago
2010
Springer
This paper proposes a massively parallel hardware architecture for efficient tracing of incoherent rays, e.g. for global illumination. The general approach is centered around hier...
CF
2009
ACM
14 years 5 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...