Sciweavers

110 search results - page 17 / 22
» Can hardware performance counters be trusted
Sort
View
ISPASS
2010
IEEE
14 years 2 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
CF
2007
ACM
13 years 11 months ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee
WIMOB
2008
IEEE
14 years 1 months ago
A Protocol for Pervasive Distributed Computing Reliability
Abstract—The adoption of new hardware and software architectures will make future generations of pervasive devices more flexible and extensible. Networks of computational nodes ...
Alberto Ferrante, Roberto Pompei, Anastasia Stulov...
EUROMICRO
2006
IEEE
14 years 1 months ago
Visualization of Areas of Interest in Component-Based System Architectures
Understanding complex component-based systems often requires getting insight in how certain system properties, such as performance, trust, reliability, or structural attributes, c...
Heorhiy Byelas, Egor Bondarev, Alexandru Telea
ESORICS
2010
Springer
13 years 8 months ago
Election Verifiability in Electronic Voting Protocols
We present a formal, symbolic definition of election verifiability for electronic voting protocols in the context of the applied pi calculus. Our definition is given in terms of bo...
Steve Kremer, Mark Ryan, Ben Smyth