An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
: Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRA...
Jing Li, Charles Augustine, Sayeef S. Salahuddin, ...
Achieving high performance under a peak temperature limit is a first-order concern for VLSI designers. This paper presents a new model of a thermally-managed system, where a stoch...
Temperature hot-spots have been known to cause severe reliability problems and to significantly increase leakage power. The register file has been previously shown to exhibit the ...
The test time for core-external interconnect shorts/opens is typically much less than that for core-internal logic. Therefore, prior work on test infrastructure design for core-ba...