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» Challenges in Physical Chip Design
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ASAP
2005
IEEE
135views Hardware» more  ASAP 2005»
14 years 2 months ago
Via-Aware Global Routing for Good VLSI Manufacturability and High Yield
CAD tools have become more and more important for integrated circuit (IC) design since a complicated system can be designed into a single chip, called system-on-a-chip (SOC), in w...
Yang Yang, Tong Jing, Xianlong Hong, Yu Hu, Qi Zhu...
TE
2010
104views more  TE 2010»
13 years 3 months ago
Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
Scott C. Smith, Waleed Al-Assadi, Jia Di
ICDCSW
2009
IEEE
14 years 3 months ago
Joint Sleep Scheduling and Mode Assignment in Wireless Cyber-Physical Systems
Designing cyber-physical systems with high efficiency, adaptability, autonomy, reliability and usability is a challenging task. In this paper, we focus on minimizing networkwide ...
Chun Jason Xue, Guoliang Xing, Zhaohui Yuan, Zili ...
IEEEPACT
2008
IEEE
14 years 3 months ago
Multitasking workload scheduling on flexible-core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
SIGARCH
2008
107views more  SIGARCH 2008»
13 years 8 months ago
Multitasking workload scheduling on flexible core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...