280 search results - page 36 / 56 » Challenges in exploitation of loop parallelism in embedded a... |
ICDCS
2012
IEEE
11 years 9 months ago
2012
IEEE
—With users increasingly focused on an online world, an emerging challenge for the network infrastructure is the need to support Massively Multiplayer Online Role Playing Games (...
VLSISP
2008
13 years 7 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
IJVR
2008
13 years 7 months ago
2008
Museums like marine aquariums are facing a difficult problem when trying to deliver information to their visitors. The exhibits they propose are dynamic by definition. Each may con...
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. The current trend towards MPSoC platforms in most com...