280 search results - page 37 / 56 » Challenges in exploitation of loop parallelism in embedded a... |
IPPS
2000
IEEE
13 years 11 months ago
2000
IEEE
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
HPCA
2009
IEEE
14 years 2 months ago
2009
IEEE
While parallelism and multi-cores are receiving much attention as a major scalability path, customization is another, orthogonal and complementary, scalability path which can targ...
IWANN
1993
Springer
13 years 11 months ago
1993
Springer
Over the past decade a large variety of hardware has been designed to exploit the inherent parallelism of the artificial neural network models. This paper presents an overview of ...
TIP
2010
13 years 2 months ago
2010
We present a new framework for data hiding in images printed with clustered dot halftones. Our application scenario, like other hardcopy embedding methods, encounters fundamental c...
CODES
2009
IEEE
13 years 11 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...