Sciweavers

1003 search results - page 79 / 201
» Chameleon: operating system support for dynamic processors
Sort
View
SIGMETRICS
1996
ACM
174views Hardware» more  SIGMETRICS 1996»
13 years 12 months ago
Embra: Fast and Flexible Machine Simulation
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
Emmett Witchel, Mendel Rosenblum
SAC
2009
ACM
14 years 2 months ago
On scheduling soft real-time tasks with lock-free synchronization for embedded devices
In this paper, we consider minimizing the system-level energy consumption through dynamic voltage scaling for embedded devices, while a) allowing concurrent access to shared objec...
Shouwen Lai, Binoy Ravindran, Hyeonjoong Cho
HICSS
1994
IEEE
118views Biometrics» more  HICSS 1994»
13 years 12 months ago
A Distributed Architecture for an Instructable Problem Solver
Our research goal is to design systems that enable humans to teach tedious, repetitive, simple tasks to a computer. We propose here a learner/problem solver architecture for such ...
Jacky Baltes, Bruce A. MacDonald
OOPSLA
2009
Springer
14 years 2 months ago
A concurrent dynamic analysis framework for multicore hardware
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
Jungwoo Ha, Matthew Arnold, Stephen M. Blackburn, ...
SIGARCH
2008
97views more  SIGARCH 2008»
13 years 7 months ago
SP-NUCA: a cost effective dynamic non-uniform cache architecture
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
Javier Merino, Valentin Puente, Pablo Prieto, Jos&...