171 search results - page 15 / 35 » Checking Safety Properties Using Induction and a SAT-Solver |
ICST
2009
IEEE
13 years 5 months ago
2009
IEEE
Bounded model checking--as well as symbolic equivalence checking--are highly successful techniques in the hardware domain. Recently, bit-vector bounded model checkers like CBMC ha...
ICAC
2005
IEEE
14 years 1 months ago
2005
IEEE
As software comes under increasing scrutiny for its lack of safety and reliability, numerous static and partially dynamic tools (including model checking) have been proposed for v...
SCN
2011
Springer
13 years 2 months ago
2011
Springer
Model checking cryptographic protocols have evolved to a valuable method for discovering counterintuitive security flaws, which make possible for a hostile agent to subvert the go...
ATVA
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The sys...
ICSE
2008
IEEE-ACM
14 years 7 months ago
2008
IEEE-ACM
This paper examines the suitability and use of runtime verification as means for monitoring security protocols and their properties. In particular, we employ the runtime verificat...