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ISPASS
2010
IEEE
14 years 2 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
CSCW
2002
ACM
13 years 7 months ago
Sharing and building digital group histories
Organizations, families, institutions evolve a shared culture and history. In this work, we describe a system to facilitate conversation and storytelling about this collective pas...
Chia Shen, Neal Lesh, Frédéric Verni...
ERSA
2009
185views Hardware» more  ERSA 2009»
13 years 5 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl
ICASSP
2008
IEEE
14 years 2 months ago
Transmit codes and receive filters for pulse compression radar systems
Pulse compression radar systems make use of transmit code sequences and receive filters that are specially designed to achieve good range resolution and target detection capabili...
Petre Stoica, Jian Li, Ming Xue
ISORC
2007
IEEE
14 years 2 months ago
Evaluating Real-Time Publish/Subscribe Service Integration Approaches in QoS-Enabled Component Middleware
As quality of service (QoS)-enabled component middleware technologies gain widespread acceptance to build distributed real-time and embedded (DRE) systems, it becomes necessary fo...
Gan Deng, Ming Xiong, Aniruddha S. Gokhale, George...