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IWMM
2000
Springer
122views Hardware» more  IWMM 2000»
13 years 11 months ago
Concurrent Garbage Collection Using Program Slices on Multithreaded Processors
We investigate reference counting in the context of a multithreaded architecture by exploiting two observations: (1) reference-counting can be performed by a transformed program s...
Manoj Plakal, Charles N. Fischer
NIPS
2003
13 years 9 months ago
A Recurrent Model of Orientation Maps with Simple and Complex Cells
We describe a neuromorphic chip that utilizes transistor heterogeneity, introduced by the fabrication process, to generate orientation maps similar to those imaged in vivo. Our mo...
Paul Merolla, Kwabena Boahen
IJES
2008
128views more  IJES 2008»
13 years 8 months ago
On-chip implementation of multiprocessor networks and switch fabrics
: On-chipimplementationofmultiprocessorsystemsneedstoplanarisetheinterconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor ...
Terry Tao Ye, Giovanni De Micheli
TWC
2008
109views more  TWC 2008»
13 years 7 months ago
Two-stage hybrid decision feedback equalization for DS-CDMA systems
This letter proposes a hybrid decision-feedback equalizer (HDFE) for DS-CDMA systems. The proposed HDFE is carried out in two stages to improve the accuracy of the feedback signals...
Le-Nam Tran, Een-Kee Hong, Huaping Liu
DSN
2011
IEEE
12 years 7 months ago
LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory
Phase change memory (PCM) has emerged as a promising technology for main memory due to many advan­ tages, such as better scalability, non-volatility and fast read access. However,...
Lei Jiang, Yu Du, Youtao Zhang, Bruce R. Childers,...