— We consider a ring topology with limited or full switching capability as deployed in high bandwidth metro optical networks and develop a model to estimate the probability of bl...
: In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
This work presents a new switching mechanism to tolerate arbitrary faults in interconnection networks with a negligible implementation cost. Although our routing technique can be ...
This paper describes an evolvable hardware (EHW) system for generalized neural network learning. We have developed an ASIC VLSI chip, which is a building block to configure a scal...
Abstract--A method for the computation of nonlinear digital filter networks containing delay-free loops is proposed. By preserving the topology of the network this method permits t...