3395 search results - page 107 / 679 » Circuit-aware architectural simulation |
122
Voted
TON
2010
14 years 11 months ago
2010
Disruption tolerant networks rely on intermittent contacts between mobile nodes to deliver packets using a storecarry-and-forward paradigm. We earlier proposed the use of throwbox ...
138
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ICASSP
2011
IEEE
14 years 8 months ago
2011
IEEE
Decoder architectures for architecture-aware Raptor codes having regular message access-and-processing patterns are presented. Raptor codes are a class of concatenated codes compo...
168
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CODES
2011
IEEE
14 years 4 months ago
2011
IEEE
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
132
Voted
WSC
2007
15 years 6 months ago
2007
This paper investigates the applicability of the CSPI reference models in different factory planning scenarios. These scenarios are taken from real industrial use cases. The CSPI ...
138
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WSC
1997
15 years 5 months ago
1997
The DoD High Level architecture (HLA) has recently become the required method for the interconnection of all DoD computer simulations. The HLA addresses the rules by which simulat...