3395 search results - page 616 / 679 » Circuit-aware architectural simulation |
IPPS
2000
IEEE
14 years 17 days ago
2000
IEEE
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
IPPS
2000
IEEE
14 years 17 days ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
IPPS
2000
IEEE
14 years 17 days ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
IPPS
2000
IEEE
14 years 17 days ago
2000
IEEE
Abstract. Computer simulations of realistic applications usually require solving a set of non-linear partial di erential equations PDEs over a nite region. The process of obtaini...
ISMVL
2000
IEEE
14 years 17 days ago
2000
IEEE
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, comments o...