90 search results - page 10 / 18 » Clock distribution using multiple voltages |
ISVLSI
2007
IEEE
14 years 3 months ago
2007
IEEE
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
ASPDAC
2006
ACM
14 years 2 months ago
2006
ACM
Extensive research has proposed the use of multiple on-die power supplies (VDD) for reducing power consumption in CMOS circuits. We present a detailed study and design techniques ...
ISCA
2002
IEEE
14 years 1 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
HPCA
2011
IEEE
13 years 18 days ago
2011
IEEE
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
ICDCS
1996
IEEE
14 years 1 months ago
1996
IEEE
We propose a new algorithm for recovering asynchronously from failures in a distributed computation. Our algorithm is based on two novel concepts - a fault-tolerant vector clock t...