205 search results - page 38 / 41 » Clock gating architectures for FPGA power reduction |
ISCA
2007
IEEE
14 years 5 months ago
2007
IEEE
Process variation affects processor pipelines by making some stages slower and others faster, therefore exacerbating pipeline unbalance. This reduces the frequency attainable by t...
ANCS
2011
ACM
12 years 10 months ago
2011
ACM
Network virtualization has emerged as a powerful technique to deploy novel services and experimental protocols over shared network infrastructures. Although recent research has hi...
PVLDB
2010
13 years 9 months ago
2010
Complex event detection is an advanced form of data stream processing where the stream(s) are scrutinized to identify given event patterns. The challenge for many complex event pr...
ICCAD
2007
IEEE
14 years 16 days ago
2007
IEEE
– Interconnect issues are becoming increasingly important for ULSI systems. IntSim, an interconnect CAD tool, has been developed to obtain pitches of different wiring levels and ...
DATE
1999
IEEE
14 years 3 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...