96 search results - page 17 / 20 » Clock-Aware Placement for FPGAs |
FPGA
2004
ACM
14 years 22 days ago
2004
ACM
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
FPGA
2003
ACM
14 years 17 days ago
2003
ACM
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPRO for placement and routing on ...
FPGA
2001
ACM
13 years 12 months ago
2001
ACM
The partial reconfiguration feature of some of the currentgeneration Field Programmable Gate Arrays (FPGAs) can improve dependability by detecting and correcting errors in onchip ...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
A regular circuit structure called a River PLA and its reconfigurable version, Glacier PLA, are presented. River PLAs provide greater regularity than circuits implemented with sta...