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» CoRAM: an in-fabric memory architecture for FPGA-based compu...
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212
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ERSA
2007
194views Hardware» more  ERSA 2007»
15 years 7 months ago
A Scalable and Reconfigurable Shared-Memory Graphics Cluster Architecture
Abstract: If the computational demands of an interactive graphics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accele...
Ross Brennan, Michael Manzke, Keith O'Conor, John ...
147
Voted
HICSS
2006
IEEE
131views Biometrics» more  HICSS 2006»
16 years 6 days ago
Design and Characterization of a Hardware Encryption Management Unit for Secure Computing Platforms
— Software protection is increasingly necessary for uses in commercial systems, digital content distributors, and military systems. The Secure Software (SecSoft) architecture is ...
Anthony J. Mahar, Peter M. Athanas, Stephen D. Cra...
180
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ICPP
2008
IEEE
16 years 18 days ago
VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...
Heiner Litz, Holger Fröning, Mondrian Nü...