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ACMMSP
2006
ACM
260views Hardware» more  ACMMSP 2006»
14 years 4 months ago
Seven at one stroke: results from a cache-oblivious paradigm for scalable matrix algorithms
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
Michael D. Adams, David S. Wise
ICDCSW
2003
IEEE
14 years 3 months ago
Dynamic Resource Control for High-Speed Downlink Packet Access Wireless Channel
It is a challenging task to provide Quality of Service (QoS) control for a shared high-speed downlink packet access (HSDPA) wireless channel. In this paper, we first propose a ne...
Huai-Rong Shao, Chia Shen, Daqing Gu, Jinyun Zhang...
HPCA
2000
IEEE
14 years 2 months ago
A Prefetching Technique for Irregular Accesses to Linked Data Structures
Prefetching offers the potential to improve the performance of linked data structure (LDS) traversals. However, previously proposed prefetching methods only work well when there i...
Magnus Karlsson, Fredrik Dahlgren, Per Stenstr&oum...
ICS
1999
Tsinghua U.
14 years 2 months ago
Fast cluster failover using virtual memory-mapped communication
This paper proposes a novel way to use virtual memorymapped communication (VMMC) to reduce the failover time on clusters. With the VMMC model, applications’ virtual address spac...
Yuanyuan Zhou, Peter M. Chen, Kai Li
IPPS
1997
IEEE
14 years 2 months ago
External Adjustment of Runtime Parameters in Time Warp Synchronized Parallel Simulators
Several optimizations to the Time Warp synchronization protocol for parallel discrete event simulation have been proposed and studied. Many of these optimizations have included so...
Radharamanan Radhakrishnan, Lantz Moore, Philip A....