966 search results - page 125 / 194 » Code Generation for Embedded Processors |
ISCAS
2005
IEEE
14 years 2 months ago
2005
IEEE
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
CODES
2008
IEEE
13 years 10 months ago
2008
IEEE
Using traditional software profiling to optimize embedded software in an MPSoC design is not reliable. With multiple processors running concurrently and programs interacting, trad...
XPU
2005
Springer
14 years 2 months ago
2005
Springer
The main goal to be answered by this Ph.D. thesis is whether there is a potential for a successful and powerful application of agile methods and related techniques to embedded syst...
LCPC
2000
Springer
14 years 17 days ago
2000
Springer
This paper proposes a simple and efficient implementation method for a hierarchical coarse grain task parallel processing scheme on a SMP machine. OSCAR multigrain parallelizing c...
WCET
2010
13 years 6 months ago
2010
Calculating the worst-case execution time (WCET) of real-time tasks is still a tedious job. Programmers are required to provide additional information on the program flow, analyzi...