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CGO
2008
IEEE
14 years 3 months ago
Compiling for vector-thread architectures
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
Mark Hampton, Krste Asanovic
LCPC
2007
Springer
14 years 2 months ago
Revisiting SIMD Programming
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
Anton Lokhmotov, Benedict R. Gaster, Alan Mycroft,...
SCAM
2005
IEEE
14 years 2 months ago
Control Flow Graph Reconstruction for Assembly Language Programs with Delayed Instructions
Most software for embedded systems, including digital signal processing systems, is coded in assembly language. For both understanding the software and for reverse compiling it to...
Nerina Bermudo, Andreas Krall, R. Nigel Horspool
CC
2001
Springer
131views System Software» more  CC 2001»
14 years 1 months ago
Compiler Transformation of Pointers to Explicit Array Accesses in DSP Applications
Abstract. Efficient implementation of DSP applications are critical for embedded systems. However, current applications written in C, make extensive use of pointer arithmetic maki...
Björn Franke, Michael F. P. O'Boyle
ISSS
1998
IEEE
130views Hardware» more  ISSS 1998»
14 years 1 months ago
Communication and Interface Synthesis on a Rapid Prototyping Hardware/Software Codesign System
In this paper, we propose the target board architecture of a rapid prototyping embedded system based on hardware software codesign. The target board contains a TMS320C30 DSP proce...
Yin-Tsung Hwang, Yuan-Hung Wang