966 search results - page 136 / 194 » Code Generation for Embedded Processors |
PPOPP
2012
ACM
12 years 4 months ago
2012
ACM
We present Dynamic Out-of-Order Java (DOJ), a dynamic parallelization approach. In DOJ, a developer annotates code blocks as tasks to decouple these blocks from the parent executi...
CASES
2006
ACM
14 years 15 days ago
2006
ACM
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
SAMOS
2004
Springer
14 years 2 months ago
2004
Springer
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
LCPC
2000
Springer
14 years 10 days ago
2000
Springer
In translating HPF programs, a compiler has to generate local iteration and communication sets. Apart from local enumeration, local storage compression is an issue, because in HPF ...
IPPS
2009
IEEE
14 years 3 months ago
2009
IEEE
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...