Sciweavers

966 search results - page 150 / 194
» Code Generation for Embedded Processors
Sort
View
IJPP
2006
82views more  IJPP 2006»
13 years 8 months ago
Supporting Microthread Scheduling and Synchronisation in CMPs
Chip multiprocessors hold great promise for achieving scalability in future systems. Microthreaded chip multiprocessors add a means of exploiting legacy code in such systems. Usin...
Ian Bell, Nabil Hasasneh, Chris R. Jesshope
CGO
2003
IEEE
14 years 2 months ago
Dynamic Trace Selection Using Performance Monitoring Hardware Sampling
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
Howard Chen, Wei-Chung Hsu, Dong-yuan Chen
ICAI
2004
13 years 10 months ago
A User Centered Evolutionary Scheduling Framework
The need for supporting CSCW applications with heterogeneous and varying user requirements call for adaptive and reconfigurable schedulers accommodating a mixture of real-time, pro...
Horst Wedde, Muddassar Farooq, Mario Lischka
PLDI
2012
ACM
11 years 11 months ago
Fast and precise hybrid type inference for JavaScript
JavaScript performance is often bound by its dynamically typed nature. Compilers do not have access to static type information, making generation of efficient, type-specialized m...
Brian Hackett, Shu-yu Guo
CODES
2008
IEEE
13 years 10 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...