Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Many practical applications generate irregular, nonbalanced divide-and-conquer trees which have different depths, possibly also different numbers of successors at different levels...
Load balancing involves assigning to each processor, work proportional to its performance, minimizing the execution time of the program. Althoughstatic load balancing can solve ma...
Mohammed Javeed Zaki, Wei Li, Srinivasan Parthasar...
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
Thomas L. Sterling, Daniel Savarese, Peter MacNeic...
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...