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» Code Generation for Polynomial Multiplication
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CGO
2008
IEEE
14 years 1 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
CGO
2008
IEEE
14 years 1 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
KBSE
2006
IEEE
14 years 1 months ago
Sieve: A Tool for Automatically Detecting Variations Across Program Versions
Software systems often undergo many revisions during their lifetime as new features are added, bugs repaired, abstractions simplified and refactored, and performance improved. Wh...
Murali Krishna Ramanathan, Ananth Grama, Suresh Ja...
RTSS
2006
IEEE
14 years 1 months ago
MCGREP - A Predictable Architecture for Embedded Real-Time Systems
Real-time systems design involves many important choices, including that of the processor. The fastest processors achieve performance by utilizing architectural features that make...
Jack Whitham, Neil C. Audsley
SIGSOFT
2006
ACM
14 years 1 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar