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» Code Transformations to Improve Memory Parallelism
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PATMOS
2000
Springer
14 years 5 days ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...
ICS
2005
Tsinghua U.
14 years 2 months ago
Improving the computational intensity of unstructured mesh applications
Although unstructured mesh algorithms are a popular means of solving problems across a broad range of disciplines—from texture mapping to computational fluid dynamics—they ar...
Brian S. White, Sally A. McKee, Bronis R. de Supin...
IPPS
2007
IEEE
14 years 2 months ago
Memory Optimizations For Fast Power-Aware Sparse Computations
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
CODES
2000
IEEE
14 years 1 months ago
Co-design of interleaved memory systems
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
Hua Lin, Wayne Wolf
ISPAN
2005
IEEE
14 years 2 months ago
Maximum Loop Distribution and Fusion for Two-level Loops Considering Code Size
In this paper, we propose a technique combining loop distribution with loop fusion to improve the timing performance without increasing the code size of the transformed loops. We ...
Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, M...