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IWMM
2011
Springer
217views Hardware» more  IWMM 2011»
12 years 10 months ago
On the theory and potential of LRU-MRU collaborative cache management
The goal of cache management is to maximize data reuse. Collaborative caching provides an interface for software to communicate access information to hardware. In theory, it can o...
Xiaoming Gu, Chen Ding
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
11 years 10 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
14 years 21 days ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue
IEEEPACT
1999
IEEE
13 years 11 months ago
On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors
The performance of applications on large shared-memory multiprocessors with coherent caches depends on the interaction between the granularity of data sharing, the size of the coh...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
13 years 11 months ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers