Sciweavers

133 search results - page 12 / 27
» Code restructuring for improving cache performance of MPSoCs
Sort
View
SIGCOMM
2010
ACM
13 years 8 months ago
Architecture optimisation with Currawong
We describe Currawong, a tool to perform system software architecture optimisation. Currawong is an extensible tool which applies optimisations at the point where an application i...
Nicholas Fitzroy-Dale, Ihor Kuz, Gernot Heiser
MICRO
2007
IEEE
188views Hardware» more  MICRO 2007»
14 years 2 months ago
Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Fal...
CODES
2003
IEEE
14 years 1 months ago
Accurate estimation of cache-related preemption delay
Multitasked real-time systems often employ caches to boost performance. However the unpredictable dynamic behavior of caches makes schedulability analysis of such systems difficul...
Hemendra Singh Negi, Tulika Mitra, Abhik Roychoudh...
VLDB
2004
ACM
126views Database» more  VLDB 2004»
14 years 1 months ago
STEPS towards Cache-resident Transaction Processing
Online transaction processing (OLTP) is a multibillion dollar industry with high-end database servers employing state-of-the-art processors to maximize performance. Unfortunately,...
Stavros Harizopoulos, Anastassia Ailamaki
WWW
2001
ACM
14 years 9 months ago
Integrating Software Agents into the HTTP Caching Infrastructure
Mobile software agents are an increasingly important programming model within the World Wide Web (WWW). Typically programmed in Java or another machine- independent language, the ...
Jesse Greenwald, Daniel Andresen