133 search results - page 18 / 27 » Code restructuring for improving cache performance of MPSoCs |
RTSS
2009
IEEE
14 years 3 months ago
2009
IEEE
—Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
ICPPW
2008
IEEE
14 years 3 months ago
2008
IEEE
Chip multiprocessors (CMP) are widely used for high performance computing. Further, these CMPs are being configured in a hierarchical manner to compose a node in a cluster system....
ISPASS
2008
IEEE
14 years 3 months ago
2008
IEEE
—The potential for improving the performance of data-intensive scientific programs by enhancing data reuse in cache is substantial because CPUs are significantly faster than me...
MICRO
2000
IEEE
14 years 29 days ago
2000
IEEE
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...