133 search results - page 26 / 27 » Code restructuring for improving cache performance of MPSoCs |
MICRO
2005
IEEE
14 years 2 months ago
2005
IEEE
Data prefetching via helper threading has been extensively investigated on Simultaneous MultiThreading (SMT) or Virtual Multi-Threading (VMT) architectures. Although reportedly la...
FTDCS
2003
IEEE
14 years 1 months ago
2003
IEEE
Increasingly, Internet-level distributed systems are oriented as much toward information access as they are toward computation. From computer-supported collaborative work to peer-...
PPOPP
2003
ACM
14 years 1 months ago
2003
ACM
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating ...
ICPP
1999
IEEE
14 years 27 days ago
1999
IEEE
Instruction fetch bandwidth is feared to be a major limiting factor to the performance of future wide-issue aggressive superscalars. In this paper, we focus on Database applicatio...
CODES
2008
IEEE
14 years 3 months ago
2008
IEEE
Software-controlled scratchpad memory is increasingly employed in embedded systems as it offers better timing predictability compared to caches. Previous scratchpad allocation alg...