162 search results - page 23 / 33 » Collaborative Routing Architecture for FPGA |
ICNP
2009
IEEE
14 years 2 months ago
2009
IEEE
—Routing protocols are implemented in the form of software running on a general-purpose microprocessor. However, conventional software-based router architectures face significan...
FPGA
2004
ACM
14 years 27 days ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
In this paper we introduce a new Simulated Annealingbased timing-driven placement algorithm for FPGAs. This paper has three main contributions. First, our algorithm employs a nove...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...