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FPL
2008
Springer
116views Hardware» more  FPL 2008»
13 years 9 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
SLIP
2003
ACM
14 years 28 days ago
A hierarchical three-way interconnect architecture for hexagonal processors
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Che...
CCGRID
2008
IEEE
14 years 2 months ago
MPI Collectives on Modern Multicore Clusters: Performance Optimizations and Communication Characteristics
The advances in multicore technology and modern interconnects is rapidly accelerating the number of cores deployed in today’s commodity clusters. A majority of parallel applicat...
Amith R. Mamidala, Rahul Kumar, Debraj De, Dhabale...
CCGRID
2006
IEEE
14 years 1 months ago
An Overview of Security Issues in Cluster Interconnects
— Widespread use of cluster systems in diverse set of applications has spurred significant interest in providing high performance cluster interconnects. A major inefficiency in...
Manhee Lee, Eun Jung Kim, Ki Hwan Yum, Mazin S. Yo...
ACSC
2003
IEEE
14 years 1 months ago
Communication Performance Issues for Two Cluster Computers
Clusters of commodity machines have become a popular way of building cheap high performance parallel computers. Many of these designs rely on standard Ethernet networks as a syste...
Francis Vaughan, Duncan A. Grove, Paul D. Coddingt...