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TCAD
2008
127views more  TCAD 2008»
13 years 8 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
HPCA
2004
IEEE
14 years 9 months ago
Signature Buffer: Bridging Performance Gap between Registers and Caches
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
Lu Peng, Jih-Kwon Peir, Konrad Lai
ICCAD
2003
IEEE
136views Hardware» more  ICCAD 2003»
14 years 5 months ago
Synthesis of Heterogeneous Distributed Architectures for Memory-Intensive Applications
— Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latenc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ICS
2009
Tsinghua U.
14 years 1 months ago
A translation system for enabling data mining applications on GPUs
Modern GPUs offer much computing power at a very modest cost. Even though CUDA and other related recent developments are accelerating the use of GPUs for general purpose applicati...
Wenjing Ma, Gagan Agrawal
SIGCOMM
1991
ACM
14 years 7 days ago
IP-Based Protocols for Mobile Internetworking
We consider the problem of providing network access to hosts whose physical location changes with time. Such hosts cannot depend on traditional forms of network connectivity and r...
John Ioannidis, Dan Duchamp, Gerald Q. Maguire Jr.