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DAC
2009
ACM
14 years 9 months ago
Exploring serial vertical interconnects for 3D ICs
Three-dimensional integrated circuits (3D ICs) offer a promising solution to overcome the on-chip communication bottleneck and improve performance over traditional two-dimensional...
Sudeep Pasricha
ICS
2009
Tsinghua U.
14 years 3 months ago
Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
Jiayuan Meng, Kevin Skadron
INFOCOM
2009
IEEE
14 years 2 months ago
Delay-Optimal Opportunistic Scheduling and Approximations: The Log Rule
—This paper considers the design of opportunistic packet schedulers for users sharing a time-varying wireless channel from the performance and the robustness points of view. Firs...
Bilal Sadiq, Seung Jun Baek, Gustavo de Veciana
DSRT
2008
IEEE
14 years 2 months ago
Interfacing and Coordination for a DEVS Simulation Protocol Standard
The DEVS formalism has been adopted and developed independently by many research teams, which led to various DEVS implementation versions. Consequently, different DEVS implementat...
Khaldoon Al-Zoubi, Gabriel A. Wainer
ICC
2007
IEEE
212views Communications» more  ICC 2007»
14 years 2 months ago
Middleware Vertical Handoff Manager: A Neural Network-Based Solution
— – Major research challenges in the next generation of wireless networks include the provisioning of worldwide seamless mobility across heterogeneous wireless networks, the im...
Nidal Nasser, Sghaier Guizani, Eyhab Al-Masri