254 search results - page 21 / 51 » Compilation Techniques for Out-of-Core Parallel Computations |
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
Multipartitioning is a strategy for parallelizing computations that require solving 1D recurrences along each dimension of a multi-dimensional array. Previous techniques for multi...
MICRO
1997
IEEE
14 years 25 days ago
1997
IEEE
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
PPOPP
2009
ACM
14 years 9 months ago
2009
ACM
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
FCCM
2002
IEEE
14 years 1 months ago
2002
IEEE
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies regi...