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CONPAR
1994
13 years 11 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...
AIS
2004
Springer
14 years 1 months ago
Proposal of High Level Architecture Extension
The paper proposes three dimensional extension to High Level ARchitecture (HLA) and Runtime Infrastructure (RTI) to solve several issues such as security, information hiding proble...
Jae-Hyun Kim, Tag Gon Kim
EURODAC
1994
IEEE
211views VHDL» more  EURODAC 1994»
13 years 12 months ago
Advanced simulation and modeling techniques for hardware quality verification of digital systems
synchronisation also play a fundamental role in overall system robustness. ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Interference (EMI) issues also have to be conside...
S. Forno, Stephen Rochel
VEE
2005
ACM
143views Virtualization» more  VEE 2005»
14 years 1 months ago
Optimized interval splitting in a linear scan register allocator
We present an optimized implementation of the linear scan register allocation algorithm for Sun Microsystems’ Java HotSpotTM client compiler. Linear scan register allocation is ...
Christian Wimmer, Hanspeter Mössenböck
ANSS
2004
IEEE
13 years 11 months ago
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
Jie Tao, Josef Weidendorfer