Sciweavers

559 search results - page 66 / 112
» Compiling Image Processing Applications to Reconfigurable Ha...
Sort
View
ASM
2008
ASM
13 years 11 months ago
Using EventB to Create a Virtual Machine Instruction Set Architecture
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
Stephen Wright
PETRA
2010
ACM
13 years 7 months ago
Integrating RFID on event-based hemispheric imaging for internet of things assistive applications
Automatic surveillance of a scene in a broad sense comprises one of the core modules of pervasive applications. Typically, multiple cameras are installed in an area to identify ev...
Vassilis Kolias, Ioannis Giannoukos, Christos Anag...
ICIP
1999
IEEE
14 years 10 months ago
A Fast Image Registration Technique for Motion Artifact Reduction in DSA
In digital subtraction angiography (DSA), patient motion is the primary cause of image quality degradation. The motion correction algorithms developed so far were not sufficiently...
Erik H. W. Meijering, Karel J. Zuiderveld, Wiro J....
IPPS
1998
IEEE
14 years 1 months ago
A Configurable Computing Approach Towards Real-Time Target Tracking
Traditionally, tracking systems require dedicated hardware to handle the computational demands and input/output rates imposed by real-time video sources. An alternative presented i...
Bharadwaj Pudipeddi, A. Lynn Abbott, Peter M. Atha...
ISCAS
2008
IEEE
141views Hardware» more  ISCAS 2008»
14 years 3 months ago
ASPA: Focal Plane digital processor array with asynchronous processing capabilities
— In this paper we present implementation and experimental results for a digital vision chip that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits fr...
Alexey Lopich, Piotr Dudek