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» Compiling SA-C Programs to FPGAs: Performance Results
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153
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CODES
2009
IEEE
15 years 8 months ago
Building heterogeneous reconfigurable systems with a hardware microkernel
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a softwarelike ...
Jason Agron, David L. Andrews
PPOPP
2009
ACM
16 years 4 months ago
OpenMP to GPGPU: a compiler framework for automatic translation and optimization
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
Seyong Lee, Seung-Jai Min, Rudolf Eigenmann
161
Voted
PPOPP
2003
ACM
15 years 9 months ago
Compiler support for speculative multithreading architecture with probabilistic points-to analysis
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Ro...
DAGSTUHL
2004
15 years 5 months ago
Removing Cycles in Esterel Programs
Abstract. Synchronous programs may contain cyclic signal interdependencies. This prohibits a static scheduling, which limits the choice of available compilation techniques for such...
Jan Lukoschus, Reinhard von Hanxleden
IPPS
2003
IEEE
15 years 9 months ago
Performance and Overhead in a Hybrid Reconfigurable Computer
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. IntelĀ...
Osman Devrim Fidanci, Daniel S. Poznanovic, Kris G...