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» Compiling SA-C Programs to FPGAs: Performance Results
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ASPLOS
2009
ACM
16 years 4 months ago
Producing wrong data without doing anything obviously wrong!
This paper presents a surprising result: changing a seemingly innocuous aspect of an experimental setup can cause a systems researcher to draw wrong conclusions from an experiment...
Todd Mytkowicz, Amer Diwan, Matthias Hauswirth, Pe...
CF
2005
ACM
15 years 6 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder
SIGPLAN
2002
15 years 3 months ago
Write barrier removal by static analysis
We present a new analysis for removing unnecessary write barriers in programs that use generational garbage collection. To our knowledge, this is the first static program analysis...
Karen Zee, Martin C. Rinard
147
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PPOPP
2005
ACM
15 years 9 months ago
A linear-time algorithm for optimal barrier placement
We want to perform compile-time analysis of an SPMD program and place barriers in it to synchronize it correctly, minimizing the runtime cost of the synchronization. This is the b...
Alain Darte, Robert Schreiber
ASPLOS
2011
ACM
14 years 7 months ago
Inter-core prefetching for multicore processors using migrating helper threads
Multicore processors have become ubiquitous in today’s systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications ...
Md Kamruzzaman, Steven Swanson, Dean M. Tullsen