1198 search results - page 143 / 240 » Compiling for EDGE Architectures |
131
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ICASSP
2008
IEEE
15 years 10 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
151
Voted
WCRE
2002
IEEE
15 years 8 months ago
2002
IEEE
The University of Queensland Binary Translator (UQBT ) is a static binary translation framework that allows for the translation of binary, executable programs, from one architectu...
130
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IEEEPACT
2000
IEEE
15 years 7 months ago
2000
IEEE
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
131
Voted
EUROMICRO
1998
IEEE
15 years 7 months ago
1998
IEEE
Several studies have demonstrated that out-of-order execution processors may not be the most adequate organization for wide issue processors due to the increasing penalties that w...
128
Voted
HPCA
1997
IEEE
15 years 7 months ago
1997
IEEE
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...