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PLDI
2003
ACM
15 years 9 months ago
Region-based hierarchical operation partitioning for multicluster processors
Clustered architectures are a solution to the bottleneck of centralized register files in superscalar and VLIW processors. The main challenge associated with clustered architectu...
Michael L. Chu, Kevin Fan, Scott A. Mahlke
PPOPP
1993
ACM
15 years 8 months ago
Integrating Message-Passing and Shared-Memory: Early Experience
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
David A. Kranz, Kirk L. Johnson, Anant Agarwal, Jo...
166
Voted
FPL
2006
Springer
211views Hardware» more  FPL 2006»
15 years 7 months ago
Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony's PlayStation 2 vector units offer scope for hardware acceleration of applications. We compa...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
VEE
2005
ACM
143views Virtualization» more  VEE 2005»
15 years 9 months ago
Virtual machine showdown: stack versus registers
Virtual machines (VMs) are commonly used to distribute programs in an architecture-neutral format, which can easily be interpreted or compiled. A long-running question in the desi...
Yunhe Shi, David Gregg, Andrew Beatty, M. Anton Er...
PPOPP
2009
ACM
16 years 4 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle