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CGO
2007
IEEE
15 years 10 months ago
Loop Optimization using Hierarchical Compilation and Kernel Decomposition
The increasing complexity of hardware features for recent processors makes high performance code generation very challenging. In particular, several optimization targets have to b...
Denis Barthou, Sébastien Donadio, Patrick C...
LCPC
2005
Springer
15 years 9 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
113
Voted
PPPJ
2004
ACM
15 years 9 months ago
A dynamic compiler for embedded Java virtual machines
A new acceleration technology for Java embedded virtual machines is presented in this paper. Based on the selective dynamic compilation technique, this technology addresses the J2...
Mourad Debbabi, Abdelouahed Gherbi, Lamia Ketari, ...
155
Voted
IPPS
2002
IEEE
15 years 8 months ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel
139
Voted
CGO
2010
IEEE
15 years 8 months ago
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs
In this paper we describe techniques for compiling finegrained SPMD-threaded programs, expressed in programming models such as OpenCL or CUDA, to multicore execution platforms. Pr...
John A. Stratton, Vinod Grover, Jaydeep Marathe, B...