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» Completeness Results for Memory Logics
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IEEEPACT
2006
IEEE
14 years 1 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
TPHOL
2009
IEEE
14 years 2 months ago
Extended First-Order Logic
ion and equality to base types but retains lambda abstractions and higher-order variables. We show that this fragment enjoys the characteristic properties of first-order logic: co...
Chad E. Brown, Gert Smolka
ACMMSP
2005
ACM
115views Hardware» more  ACMMSP 2005»
14 years 1 months ago
Performance characteristics of MAUI: an intelligent memory system architecture
Combining ideas from several previous proposals, such as Active Pages, DIVA, and ULMT, we present the Memory Arithmetic Unit and Interface (MAUI) architecture. Because the “inte...
Justin Teller, Charles B. Silio Jr., Bruce L. Jaco...
AAAI
1990
13 years 8 months ago
Skolem Functions and Equality in Automated Deduction
We present a strategy for restricting the application of the inference rule paramodulation. The strategy applies to problems in first-order logic with equality and is designed to ...
William McCune
GLVLSI
2005
IEEE
122views VLSI» more  GLVLSI 2005»
14 years 1 months ago
PIM lite: a multithreaded processor-in-memory prototype
Abstract— PIM Lite is a processor-in-memory prototype implemented in a 0.18 micron logic process. PIM Lite provides a complete working demonstration of a minimal-state, lightweig...
Shyamkumar Thoziyoor, Jay B. Brockman, Daniel Rinz...