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FSTTCS
2006
Springer
14 years 11 days ago
On Continuous Timed Automata with Input-Determined Guards
We consider a general class of timed automata parameterized by a set of "input-determined" operators, in a continuous time setting. We show that for any such set of opera...
Fabrice Chevalier, Deepak D'Souza, Pavithra Prabha...
FPL
2005
Springer
111views Hardware» more  FPL 2005»
14 years 2 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....
HIPC
2009
Springer
13 years 6 months ago
Optimizing the use of GPU memory in applications with large data sets
Abstract--With General Purpose programmable GPUs becoming more and more popular, automated tools are needed to bridge the gap between achievable performance from highly parallel ar...
Nadathur Satish, Narayanan Sundaram, Kurt Keutzer
FCCM
2007
IEEE
129views VLSI» more  FCCM 2007»
14 years 3 months ago
Automatic On-chip Memory Minimization for Data Reuse
FPGA-based computing engines have become a promising option for the implementation of computationally intensive applications due to high flexibility and parallelism. However, one...
Qiang Liu, George A. Constantinides, Konstantinos ...
PCI
2005
Springer
14 years 2 months ago
Tuning Blocked Array Layouts to Exploit Memory Hierarchy in SMT Architectures
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
Evangelia Athanasaki, Kornilios Kourtis, Nikos Ana...