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» Completeness Results for Memory Logics
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PARLE
1992
14 years 24 days ago
Reliable Communication in VPL
We compare di erent degrees of architecture abstraction and communication reliability in distributed programming languages. A nearly architecture independent logic programming lang...
eva Kühn, Franz Puntigam
ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
14 years 28 days ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
HPDC
2007
IEEE
14 years 3 months ago
Feedback-directed thread scheduling with memory considerations
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
Fengguang Song, Shirley Moore, Jack Dongarra
INTERACT
2007
13 years 10 months ago
EMA-Tactons: Vibrotactile External Memory Aids in an Auditory Display
Abstract. Exploring any new data set always starts with gathering overview information. When this process is done non-visually, interactive sonification techniques have proved to b...
Johan Kildal, Stephen A. Brewster
IPPS
2000
IEEE
14 years 1 months ago
A Mechanism for Speculative Memory Accesses Following Synchronizing Operations
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
Takayuki Sato, Kazuhiko Ohno, Hiroshi Nakashima