Sciweavers

903 search results - page 54 / 181
» Completeness Results for Memory Logics
Sort
View
ASAP
2004
IEEE
126views Hardware» more  ASAP 2004»
14 years 15 days ago
Hyper-Programmable Architectures for Adaptable Networked Systems
We explain how modern programmable logic devices have capabilities that are well suited for them to assume a central role in the implementation of networked systems, now and in th...
Gordon J. Brebner, Philip James-Roxby, Eric Keller...
ISCA
2009
IEEE
150views Hardware» more  ISCA 2009»
14 years 3 months ago
Stream chaining: exploiting multiple levels of correlation in data prefetching
Data prefetching has long been an important technique to amortize the effects of the memory wall, and is likely to remain so in the current era of multi-core systems. Most prefetc...
Pedro Diaz, Marcelo Cintra
PPOPP
2003
ACM
14 years 2 months ago
Programming the FlexRAM parallel intelligent memory system
In an intelligent memory architecture, the main memory of a computer is enhanced with many simple processors. The result is a highly-parallel, heterogeneous machine that is able t...
Basilio B. Fraguela, Jose Renau, Paul Feautrier, D...
ECAI
2006
Springer
14 years 13 days ago
Knowing Minimum/Maximum n Formulae
Abstract. We introduce a logical language with nullary operators min(n), for each non-negative integer n, which mean `the reasoner has at least n different beliefs'. The resul...
Thomas Ågotnes, Natasha Alechina
DLOG
2008
13 years 11 months ago
Distributed Resolution for ALC
The use of Description Logic as the basis for Semantic Web Languages has led to new requirements with respect to scalable and nonstandard reasoning. In this paper, we address the p...
Anne Schlicht, Heiner Stuckenschmidt